Memristor Symbol

With the radical capability to retain its state memristor is going to bring a revolutionary change in the way, we store and process the data. If you are not aware of memristor have a brief overview here. In this post, we will be focusing on the developmental milestones of memristor from a conceptual element to a real-world implementation in a chronological manner.

All growth depends upon activity. There is no development physically or intellectually without effort, and effort means work.

Calvin Coolidge

Development of memristor is not all of a sudden bases for the concept. Like many other inventions it has grown through many peaks and dips but still is in its young age of development cycle. Till this technology gets matured let’s have a look at it in historical perspective beginning from 1960.

1960: Bernard Widrow develops a 3-terminal device called a “memristor” as a new fundamental circuit component forming the basis of a neural network circuit called ADALINE.

1967: J.G. Simmons and R.R.Verderber publish an article in the Proceeding of the Royal Society of London entitled “New conduction and reversible memory phenomena in thin insulating films”.

1968: F. Argall publishes an article in Solid-State Electronics entitled “Switching Phenomena in Titanium Oxide Thin Films”.

1971: Leon Chua, a professor at UC Berkeley, postulates a new two-terminal circuit element characterized by a relationship between charge and flux linkage as a fourth fundamental circuit element in the article “Memristor-the Missing Circuit Element” published in IEEE Transactions on Circuit Theory.

1976: Leon Chua and his student Sung Mo Kang generalized “Memristive Devices and Systems”

1990: S.Thakoor, A. Moopenn, T.Daud, and A.P. Thakoor publish an article entitled “Solid-state thin-film memristor for electronic neural networks”

1994: F. A. Buot and A. K. Rajagopal publishes in the Journal of Applied Physics an article entitled “Binary information storage at zero bias in quantum-well diodes”.

2003: A. Bandyopadhyay and A. J. Pal from Indian Association for the Cultivation of Science demonstrated Large conductance switching and memory effects in organic molecules for data-storage applications, in Appl. Phys. Lett. 82, 1215 (2003). They demonstrated current-voltage
characteristics similar to the prediction of Chua’s memristor and they demonstrated Random Access Memory for millions of times and Read Only memory for hours.

2008: Greg Snider of HP Labs receives U.S. Patent 7,359,888 (assigned to Hewlett-Packard) including basic claims to a nanoscale 2-terminal resistance switch crossbar array formed as a
neural network. On May 1 Strukov, Snider, Stewart and Williams published an article in Nature identifying a link between the 2-terminal resistance switching behaviour found in nanoscale systems and memristors.

2009: Persian and Chua extended the notion of memristive systems to capacitive and inductive elements, namely capacitors and inductors whose properties depend on the state and history of the system.

2012: A team of researchers from HRL Laboratories and the University of Michigan announced the first functioning memristor array built on a CMOS chip.

2013: The first products using memristor technology are expected to become available as early as 2018 according to the announcement of HP lab.

2015: Knowm Inc announced Self Directed Channel (SDC) memristors commercially.

There are many arguments made in disagreement of the theory but that is not included in this list as we are mainly focusing on development related activities here. The future looks bright and perspective for the computing and storage technology with further advancements.

By Purnendu Kumar

Purnendu is currently working as Senior Project Engineer at QuNu Labs, Indias only Quantum security company. He has submitted his thesis for Masters (MS by research 2014-17) in electrical engineering at IIT Madras for doing his research on “constant fraction discriminator” and “amplitude and rise-time compensated discriminator” for precise time stamping of Resistive Plate Chamber detector signals. In collaboration with India Based Neutrino observatory project, he has participated in design and upgrade of FPGA-based data acquisition system, test-jig development, and discrete front-end design. After completion of his bachelors in Electrical Engineering (Power and Electronics), he was awarded Junior Research Fellowship at Department of Physics and Astro-physics, University of Delhi under same (INO) project. His current interest is in high-speed circuit design, embedded systems, IoT, FPGA implementation and optimization of complex algorithms, experimental high-energy physics, and quantum mechanics.