Engineered to doom – Red flags for PCB design
this article can be taken as both ways, as a revenge :o or a guideline for what not to do. The decision is purely up-to reader. Technie X has decided,…
Decoupling – Path to power integrity
The effectiveness of the decoupling at high frequency is dependent on the number of capacitors used as opposed to the low frequency where it depends on the value of the…
Strategy for component placement
The best PCB layout starts on the foundation of component placement. It is wise to not rush the process. Every extra iteration should add up niche a feature or remove…
Selecting a PCB stack-up for EMC compliance
Good PCB stack-up is very effective in reducing differential and common mode emission from the board. Choosing a PCB stack-up in the design process is analogs to the foundation for…
15 PCB Layout guidelines to achieve EMC requirements
The PCB layout doesn't have a fixed set of rules, hence every designer generally employ a set of guidelines while using their engineering judgement. These Guidelines set out best practice…
Checklist for error-free optimized PCB layout
A good list of checks to make before committing the design of a new printed circuit board is an essential ingredient for quality assurance.
4 steps to review the PCB layout
While some portions of the circuit performance are dictated by the schematic and BOM, the PCB layout finally decide the fate of design. During layout, we often need to use…
Board bring up: Giving life to the design
Board bring - up is a planned process whereby an electronics system, including assembly, hardware, firmware, and software elements, is successively tested, validated, and iteratively debugged in order to attain…
100 Point checklist for schematic design
We have categorized the checklist in multiple sections for a systematic checking. There are many details that go into making a successful first - run design, and this checklist helps…
6 Steps of verification for error-free schematic
This article is going to cover the review part of the schematic design in a hardware flow which ensures minimum error and hence maximum reliability.